MIcroprocessor(Unit-1):Fundamentals of Microprocessor
Fundamentals of Microprocessor
1.1 Fundamentals of Microprocessor
A Microprocessor is a multipurpose programmable, clock driven, register based electronic device that reads binary instructions from a storage device called memory, accepts binary data as input, processes data according to those instructions and provide result as output.
Programmable- Performs different set of operation on the data depending on the sequence of instruction supplied by the programmer.
Clock Driven- Whole task is divided into some basic operations that is given precise system clock periods
Register Based- There is a storage element for data used in processing.
It is a program controlled semiconductor device (IC), which fetches, decodes and executes instructions.
The microprocessor operates in binary 0 and 1 known as bits and are represented in terms of electrical voltages in the machine where, 0 represents low voltage level and 1 represents high voltage level.
Each microprocessor recognizes and processes a group of bits called the Word and microprocessors are classified according to their word length such as 8 bits microprocessor with 8 bit word and 32 bit microprocessor with 32 bit word etc.
Advantages of Microprocessor:
- Computational/Processing speed is high
- Intelligence has been brought to systems
- Automation of industrial process and office automation
- Compact in size
- Maintenance is easier
Applications of Microprocessors:
- Microcomputer: Computer having microprocessor as
- Measurements and testing equipment: used in signal generators, counters, digital meters, x-ray analyzer, blood group analyzers, baby incubator, frequency synthesizers, data acquisition systems, spectrum analyzers etc.
- Industry: used in data monitoring system, automatic weighting, batching systems etc.
- Security systems: smart cameras, CCTV, smart doors etc.
- Communication system
- Accounting system
- Traffic light Control
- Data acquisition systems
- Military applications
1.2 Microprocessor Architecture and Operation
Microprocessor based system includes there components microprocessor, input/output and memory.
These components are organized around a common communication path called a bus.
– It is capable of performing various computing functions and making decisions to change the sequence of program execution.
– It can be divided in to three segments.
– Arithmetic/Logic unit: It performs arithmetic operations as addition and subtraction and logic operations as AND, OR & XOR.
Register Array: The registers are primarily used to store data temporarily during the execution of a program and are accessible to the user through instruction. The registers can be identified by letters such as B, C, D, E, H and L.
Control Unit: It provides the necessary timing and control signals to all the operations in the microcomputer. It controls the flow of data between the microprocessor and memory & peripherals.
Memory stores binary information such as instructions and data. To execute programs, the microprocessor reads instructions and data from memory and performs the computing operations in its ALU.
Memory has two sections
– Read only Memory (ROM):
– Read/Write Memory (RAM):
It communicates with the outside world using two devices input and output which are also Known as peripherals.
The input device such as keyboard, switches, and analog to digital converter transfer binary information from outside world to the microprocessor.
The output devices transfer data from the microprocessor to the outside world. They include the devices such as LED, CRT, digital to analog converter, printer etc.
It is a communication path between the microprocessor and peripherals; it is nothing but a group of wires to carry bits.
1.3 Microprocessor system with Bus Organization
Bus is a group of conducting wires which carries information. All the peripherals are connected to microprocessor through the help of Bus.
Thus , Bus is a common channel through which bits from any sources can be transferred to the destination.
A typical digital computer has many registers and paths must be provided to transfer instructions from one register to another. The number of wires will be excessive if separate lines are used between each register and all other registers in the system. So, a common bus organization is needed.
The diagram to represent bus organization of 8085 Microprocessor is given below:
There are three types of buses in microprocessor.They are:
- Address Bus
- Data Bus
- Control Bus
1. Address Bus
It is a group of conducting wires which carries address only.( location of data in the memory).
The addresses bus is unidirectional because of data flow in one direction, from the microprocessor to memory or from the microprocessor to input/out devices.
Length of Address bus of 8085 microprocessor is 16 bit(4 hexadecimal digits).
Length ranging from 0000H to FFFF H.
The microprocessor 8085 can transfer maximum 16-bit address which means it can address 65,536 different memory location .
2. Data Bus
It is a group of conducting wires which carries Data only.
The data bus is bidirectional because of data flow in both directions, from the microprocessor to memory or input/output devices and from memory or input/output devices to microprocessors.
Length of Data bus of 8085 microprocessor is 8 bit (that is, two hexadecimal Digits), ranging from 00H to FF H.
The data bus is used to perform the function of transferring binary information.
3. Control Bus
It is a group of conducting wires, which is used to generate timing and control signals to control all the associated peripherals. Microprocessor uses control bus to process data, that is what to do with selected memory location.
Some control signals are:
– Memory read
– Memory write
– I/O read
– I/O Write
– Opcode fetch
1.4 8085 Microprocessor and its Operation
It is an 8-bit microprocessor designed by Intel in 1977.
The functional block diagram of architecture of 8085 Microprocessor is very important as it gives the complete details about a Microprocessor.
The following are the functional blocks in the 8085 Microprocessor.
- Accumulator, Temporary register, Flag register
- Instruction Register, Arithmetic and Logic Unit (ALU)
- Instruction Decoder and Machine cycle encoder
- General purpose registers, Stack Pointer, Program Counter
- Incrementer / Decrementer, Timing and Control unit
- Interrupt control, Serial I/O control
- Address buffer and Address / Data buffer
The internal architecture (Functional Block Diagram of 8085 Microprocessor) is shown in figure.
The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU).
This register is used to store 8-bit data(operand) and to perform arithmetic and logical operations.
The result of the arithmetic / logic operations is also stored in the Accumulator.
2. Temporary(Temp) Register:
It is an 8-bit register, which holds the temporary data of arithmetic and logical operations.
3. Arithmetic and Logic Unit(ALU):
The ALU can perform arithmetic (such as addition and subtraction) and logic operations (such as AND, OR and EX-OR) on 8-bit data.
The Arithmetic and Logic Unit includes Accumulator, Temporary register, arithmetic and logic circuits and flag register.
It receives the data from accumulator and or TEMP register. The result is stored in the accumulator. The conditions of the result (such as carry, zero) are indicated in the flags.
4. Flag Register:
It is an 8-bit register, but only 5 bits are used. Each holds either 0 or 1 depending upon the result stored in the accumulator.
There are five flags namely Sign (S) flag, Zero (Z) flag, Auxiliary Carry (AC) flag, Parity (P) flag and Carry (CY) flag.
The microprocessor uses the flags for testing the data conditions.
- Sign (S) flag: After execution of an arithmetic and logical operation, if D7 of the result is 1, the sign flag is set. Otherwise it is reset. If D7 is 1, the number will be viewed as a negative number. If D7 is 0, the number will be viewed as a positive number.
- Zero (Z) flag: Zero flag is set(1) if the result in the accumulator is 0, otherwise it is reset(0).
- Auxiliary Carry (AC) flag: AC flag is set if there is a carry from D3 bit position of result in the accumulator, otherwise reset. It is generally used for BCD operations.
- Parity (P) flag: P flag is set (1) if the result in the accumulator has even number of 1’s , otherwise it is reset (0).
- Carry (CY) flag: CY flag is set (1) if the result of an arithmetic operation gives carry from bit position D7, otherwise it is reset (0). It is also used to indicate borrow condition during subtraction operations.
5. Instruction Register (IR):
Each instruction to be executed is fetched from memory and loaded into the instruction register. It is an 8-bit register.
6. Instruction Decoder & Machine Cycle Encoding:
This unit decodes the instruction stored in the IR. It determines the nature of instruction and establishes the sequence of events to be followed by the Timing and Control Unit.
7. General Purpose Registers:
There are six 8-bit general purpose registers namely B, C, D, E, H and L registers.
B and C registers are combined together as BC register pair for 16-bit operations. Similarly D and E registers can be used as DE resister pair and H and L as HL register pair.
There are two more 8-bit temporary registers W and Z. These registers are used to hold data during the execution of some instructions. W and Z registers cannot be used in programs.
8. Stack Pointer (SP):
The stack pointer is also a 16-bit register . It points to a memory location in R/W memory, called the stack. The beginning of the stack is defined by loading a 16-bit address in the stack pointer (register).
9. Program Counter (PC):
The Program Counter (PC) is a 16-bit register. It is used to point the address of the next instruction to be fetched from the memory. When one instruction is fetched from memory, PC is automatically incremented to point out the next instruction.
10. Incrementer / Decrementer:
This unit is used to increment or decrement the contents of the 16-bit registers.
11. Timing & Control Unit:
The internal clock generator is available in this unit.
This unit synchronizes all the microprocessor operations with the clock and generates the control signals necessary for communication between the microprocessor and peripherals.
This unit receives signals from the Instruction decoder and Machine cycle encoding unit and generates control signals according to the micro-program for the instruction.
It has three control signals ALE, RD (Active low) and WR (Active low) and three status signals IO/M(Active low), S0 and S1.
- ALE (Address Enable Latch) is the control signal which is nothing but a positive going pulse generated when a new operation is started by microprocessor. So when pulse goes high means ALE=1, it makes address bus enable and when ALE=0, means low pulse makes data bus enable.
- RD’ (Active low) and WR’ (Active low) are used to indicate whether the operation is reading the data from memory or writing the data into memory respectively.
- IO/M’ : This is a status signal used to differentiate between I/O and memory operations. When it is high , it indicates an I/O operation; When it is low indicates a memory operation. This signal is combined with RD’(Read) and WR’(Write) to generate I/O and memory signals.
- S1 and S0 are status signal similar to IO/M’ and can identify different operations.
12. Interrupt Control:
There are five hardware interrupts available in 8085 Microprocessor namely TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR for interfacing the peripherals with the microprocessor. These interrupts are handled by the Interrupt control unit.
- INTR(input): interrupt request, used as a general purpose interrupt.
- INT A (active low) signal is generated by the Interrupt control unit as an acknowledgement for an interrupting device.
- RST 7.5, 6.5, 5.5: These are vectored interrupts that transfer the program control to specific memory locations. They have higher priorities than INTR interrupt. Among these three, the priority order is 7.5, 6.5, and 5.5.
- TRAP: This is a non- maskable interrupt with highest priority.
13. Serial I/O Control:
The 8085 has two signals to implement the serial transmission of data: SID (Serial Input Data) and SOD (Serial Output Data).
Serial data is transmitted to the peripherals through SOD pin and received through the SID pin.
In serial transmission, data bits are sent over a single line, one bit at a time, such as the transmission over telephone lines.
14. Address buffer and Address / Data buffer:
The Address buffer is an 8-bit unidirectional buffer from which the higher order address bits A8 – A15 leaves the microprocessor to the memory and peripherals
The Address / Data buffer is an 8-bit bidirectional buffer used for sending the lower order address bits A0 – A7 and sending and receiving the data bits D0 – D7 to the memory and peripherals.
- VCC: +5V power supply
- VSS: Ground reference
- X1 and X2: A crystal (RC or LC network) is connected at these two pins for frequency.
- CLK OUT: It can be used as the system clock for other devices.
- RESET IN’ : When the signal on this pin goes low, the program counter is set to zero, and microprocessor is reset.
- RESET OUT: This signal indicates that the MPU is being reset. The signal can be used to reset other devices.
- HOLD (input): This signal indicates that a peripheral such as a DMA( Direct Memory Access) controller is requesting use of Address and data bus.
- HLDA (output): Hold Acknowledge. This signal acknowledges the HOLD request
1.4 8085 Instruction Cycle
A program residing in the memory unit of the computer consists of a sequence of instructions. It is first moved to the instruction register and is decoded in binary form and stored as an instruction in the memory.
The program is executed in the computer by going through a cycle for each instruction called as instruction cycle.
The time required to execute an instruction is called instruction cycle.
Each instruction cycle is subdivided into a sequence of phases :
- Fetch an instruction from memory.
- Decode the instruction.
- Execute the instruction.
The computer takes a certain period to complete this task i.e., instruction fetching, decoding and executing on the basis of clock speed. Such a time period is called ‘Instruction cycle’ and consists two cycles namely fetch and Execute cycle.
The sequence of operations which are required to fetch an op-code from the memory constitute a fetch cycle.
The necessary steps which are required to get data from the memory and to perform the operation specified by an instruction constitute an execute cycle.
1.5 Machine Cycle & T- States
The execution of any 8085 program consists of a sequence of READ and WRITE operations.
These READ and WRITE operations are the only communication between the processor and the other components(peripherals).
Each READ or WRITE operations of the 8085 is referred to as Machine Cycle. The time required to access the memory or input/output devices is called machine cycle.
Each machine cycle contains a number of clock cycles (also referred to as T-states). It is one subdivision of operation performed in one clock period.
The first machine cycle will be executed by four or six clock periods. The machine cycles that follow will have three clock periods or T-state.
Instruction may be one byte, two byte or three byte long.
The first byte of any type of instruction is the op-code (machine code of the instruction). The second or third byte of an instruction may be the data or the address.
To fetch an op-code of an instruction from memory, three clock cycles are required. (3T)
In the case of slow memory, the CPU has to wait till the memory send the op-code. The clock cycle for which the CPU waits is called the Wait Cycle.(1T)
Thus op code fetch cycle = 4T
After the opcode of an instruction fetched from the memory, the execution begins.
From the instruction register it goes to instruction decoder which decodes the instruction and after the decoding of the instruction, the task specified in the instruction is carried out. This is called the Execute Operation.
One Byte: In one byte instruction, the operand is a general purpose register and opcode and operand are specified by one byte. The time taken in execution is one clock cycle.
Two/Three Byte: In the two byte or three byte instruction which contains data or address which is still lying in the memory, the CPU perform the Read operation to get the desired data. After receiving the data, it performs the execute operation.
Read Operation: In the Read operation, the quantity received from the memory are data or operand address.
Write operation: In the write operation, data are sent from the CPU to the memory or to an output device.
The following are the various machine cycles of 8085 microprocessor.
- Op-code Fetch (OF) (4T)
- Memory Read (MR) (3T)
- Memory Write (MW) (3T)
- I/O Read (IOR) (3T)
- I/O Write (IOW)(3T)
The machine cycle and instruction cycle takes multiple clock periods. A portion of an operation carried out in one system clock period is called as T-state.
Timing Diagram is a graphical representation. It represents the execution time taken by each instruction in a graphical format. The execution time is represented in T-states.
OPCODE FETCH MACHINE CYCLE IN 8085
The opcodes are stored in memory. So, the processor executes the opcode fetch machine cycle to fetch the opcode from memory.
Each instruction of the processor has one byte opcode. Every instruction starts with opcode fetch machine cycle.
The time taken by the processor to execute the opcode fetch cycle is 4T.
– 3T-states are used for fetching the opcode from memory
– T-states are used for internal operations by the processor.
The timing diagram for Opcode Fetch machine cycle is shown in figure.
Eg. Opcode fetch machine cycle of MVI A, 65H with its Timing Diagram.
Let opcode of MVI(3EH) is stored in memory address 2000
In T1- state:
- 1st Memory location 2000 will be enabled so microprocessor can read or write value from that specified location. For this, The microprocessor places the higher order 8-bits(20) on A15 – A8 address bus and the lower order 8-bits(00) on AD7 – AD0 address / data bus.
- ALE = 1, i.e. AD7 – AD0 is holding address bit,
- RD’ = 1, i.e. No data Is being read form memory intially.
- ALE = 0, AD7 – AD0 will hold data bit,
In T2- state:
- ALE = 0, AD7 – AD0 will be holding data bit of MVI.
- RD’ = 0, thus Opcode value(3EH) is placed on D7 – D0 the address / data bus.
In T3- state:
The microprocessor transfers the Opcode on the address / data bus to Instruction Register (IR). The microprocessor makes the RD’ line HIGH to disable memory read.
The microprocessor decodes the instruction.
The timing diagram is shown below:
OPCODE Memory Read Machine Cycle In 8085
The memory read machine cycle is executed by the processor to read a data byte from memory. The processor takes 3T states to execute this cycle. But, 2-byte and 3-byte instructions require additional machine cycles to read the operands from memory.
For example, the instruction MVI A, 50H requires one OF machine cycle and one MR machine cycle to read the operand (50H) from memory.
Timing Diagram for Memory Read Machine Cycle
OPCODE Memory Write Machine Cycle In 8085
The memory write machine cycle is executed by the processor to write a data byte in a memory location. The processor takes, 3T states to execute this machine cycle.
The timing diagram is shown below:
I/O Read Machine Cycle of 8085
Microprocessor uses the I/O Read machine cycle for receiving a data byte from the I/O port or from the peripheral in I/O mapped I/O systems.
The IN instruction uses this machine cycle during execution. The IOR machine cycle takes 3 T-states.
I/O Write Machine Cycle of 8085
Microprocessor uses the I/O Write machine cycle for sending a data byte to the I/O port or to the peripheral in I/O mapped I/O systems. The OUT instruction uses this machine cycle during execution. The IOR machine cycle takes 3 T-states.
Timing diagram for STA 526AH
• STA - The contents of the accumulator is stored in the specified address (526A).
The opcode of the STA instruction is said to be 32H. It is fetched from the memory 41FFH (see fig). - OF machine cycle
Then the lower order memory address is read (6A). - Memory Read Machine Cycle
Read the higher order memory address (52).- Memory Read Machine Cycle
The combination of both the addresses are considered and the content from accumulator is written in 526A. - Memory Write Machine Cycle.
let the content of accumulator is C7H. So, C7H from accumulator is now stored in 526A.
The complete diagram is seen as:
1. Data Transfer Instructions:
This group of instruction copy data from a source location to destination location without modifying the contents of the source.
The transfer of data may be between the registers or between register and memory or between an I/O device and accumulator.
a. MOV Rd, Rs(move register instruction)
- 1 byte instruction
- Copies data from source register to destination register.
- Rd & Rs may be A, B, C, D, E, H &L
- E.g. MOV A, B
b. MOV M, R (Move to memory from register)
- Copy the contents of the specified register to memory. Here memory is the location specified by contents of the HL register pair.
- E.g. MOV M, B
c. MOV R, M (move to register from memory)
- Copy the contents of memory location specified by HL pair to specified register
- E. g. MOV B, M
d. MVI R, 8 bit data (move immediate instruction)
- 2 byte instruction
- Loads the second byte ( 8 bit immediate data) into the register specified.
- E.g. MVI C, 53H
e. LDA 4035H (Load accumulator direct)
- 3-byte instruction
- Loads the accumulator with the contents of memory location whose address is specified by 16 bit address. A [4035H]
f. LDAX RP (Load accumulator indirect)
- 1 byte instruction.
- Loads the contents of memory location pointed by the contents of register pair to accumulator.
- Eg. LDAX B
- if B= 90, C= 00
- LDAX B A= 
g. LXI RP, 2 bytes data (load register pair)
- 3-byte instruction
- Load immediate data to register pair
- Register pair may be BC, DE, HL & SP(Stack pointer)
- 1 st byte- Op-code
- 2 nd byte – lower order data
- 3 rd byte- higher order data
- E.g. LXI B, 4532H; B←45, C←32H
h. STA 16-bit address (store accumulator contents direct)
- 3-byte instruction.
- Stores the contents of accumulator to specified address
- E.g. STA 2050H ← [A]
i. STAX RP
- 1 byte instruction
- Stores the contents of accumulator to memory location specified by the contents of register pair.
- E.g. STAX B [BC]← A
j. IN 8-bit address
- 2-byte instruction
- Read data from the input port address and loads data into the accumulator.
- E. g. IN 40H A← [40H]
k. OUT 8-bit address
- 2-byte instruction , Copies the contents of the accumulator to the output port address
- E. g. OUT 40H ←A
1.7 Addressing Modes in 8085
Every instruction of a program has to operate on a data. The various method of specifying the data to be operated by the instruction are Addressing modes.
The instruction consists of op-code and data called operand. The various format (way) of specifying the operands are called addressing mode.
The effective address is the address of the operand in a computational-type instruction.
The most well known addressing mode are:
Direct addressing mode:
In this mode the effective address is equal to the address part of the instruction.
The operand resides in memory and its address is given directly by the address field of the instruction
For example LDA 4000H; load the content of memory location 4000H into the accumulator.
Register direct addressing mode:
In this mode, the operands are in.
This mode specifies the register or register pair that contains the data
For example MOV A, B.
Here register B contains data rather than address of the data.
Register Indirect addressing mode:
In this mode the address part of the instruction specifies the memory whose contents are the address of the operand.
In other words, the selected register contains the address of the operand rather than the operand itself.
For example LDAX B ; Load the accumulator with the content of memory location pointed by BC register pair.
E.g. MOV R, M
Immediate addressing mode:
In this mode the operand is specified in the instruction itself.
The operand field contains the actual operand.
For example MVI B, 50H
Implied addressing mode:
In this mode the operands are specified implicitly in the definition of the instruction.
CMA-“complement accumulator” is an implied-mode instruction because the operand in the accumulator register is implied in the definition of the instruction.
Examples HLT: Halt, EI: Enable interrupt, DI: Disable interrupt
1.8 Introduction to 8086
8086 Microprocessor is an enhanced version of 8085Microprocessor that was designed by Intel in 1976.
It is a 16-bit Microprocessor having 20 address lines and 16 data lines.
Comparison between 8085 & 8086 Microprocessor
Size − 8085 is 8-bit microprocessor, whereas 8086 is 16-bit microprocessor.
Address Bus − 8085 has 16-bit address bus while 8086 has 20-bit address bus.
Instruction − 8085 doesn’t have an instruction queue, whereas 8086 has an instruction queue. resulting in faster processing.
Pipelining − 8085 doesn’t support a pipelined architecture while 8086 supports a pipelined architecture.
I/O − 8085 can address 2^8 = 256 I/O's, whereas 8086 can access 2^16 = 65,536 I/O's.
Cost − The cost of 8085 is low whereas that of 8086 is high.